OCTAL BUS TRANSCEIVER STATE

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profil-zyan-2012

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Niveau: Secondaire, Lycée, Terminale
74ACT245 OCTAL BUS TRANSCEIVER (3-STATE) ? May 1999 n HIGH SPEED: tPD = 5.5 ns (TYP.) at VCC = 5V n LOW POWER DISSIPATION: ICC =8 µA (MAX.) at TA = 25 oC n COMPATIBLEWITH TTL OUTPUTS VIH = 2V (MIN) VIL = 0.8V (MAX) n 50? TRANSMISSIONLINE OUTPUT DRIVE CAPABILITY n SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) n BALANCEDPROPAGATIONDELAYS: tPLH ? tPHL n OPERATING VOLTAGERANGE: VCC (OPR)= 4.5V to 5.5V n PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245 n IMPROVED LATCH-UP IMMUNITY DESCRIPTION The ACT245 is an advanced CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. This IC is intended for two-way asynchronous communication between data buses and the direction of data trasmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. IT IS PROHIBITED TO APPLY A SIGNAL TO A TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS THERMINAL IS FLOATING (HIGH IMPEDANCE STATE) IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR.

output current

iok dc

dc input

test conditions

high impedance

operating temperature

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Publié par

profil-zyan-2012

Nombre de lectures

[

74ACT245

OCTAL BUS TRANSCEIVER (3-STATE)

M (Micro Package)

1/9

T (TSSOP Package)

May 1999

nHIGH SPEED: tPD= 5.5 ns (TYP.) at VCC= 5V nLOW POWER DISSIPATION: o ICC= 8mA (MAX.) at TAC= 25 nOUTPUTSCOMPATIBLE WITH TTL VIH= 2V (MIN) VIL= 0.8V (MAX) n50WTRANSMISSION LINE OUTPUT DRIVE CAPABILITY nSYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL= 24 mA (MIN) nBALANCED PROPAGATION DELAYS: tPLH@tPHL nOPERATING VOLTAGE RANGE: VCC4.5V to 5.5V(OPR) = nPIN AND FUNCTION COMPATIBLE WITH 74 SERIES 245 nIMPROVED LATCH-UP IMMUNITY

direction of data trasmission is determined by DIR input. The enable input G can be used to disable the device so that the buses are effectively isolated. All inputs and outputs are equipped with protection circuits against static discharge, giving them 2KV ESD immunity and transient excess voltage. IT IS PROHIBITED TO APPLY A SIGNAL TO A TERMINAL WHEN IT IS IN OUTPUT MODE AND WHEN A BUS THERMINAL IS FLOATING (HIGH IMPEDANCE STATE) IT IS REQUESTED TO FIX THE INPUT LEVEL BY MEANS OF EXTERNAL PULL DOWN OR PULL UP RESISTOR.

PIN CONNECTION AND IEC LOGIC SYMBOLS

B (Plastic Package) ORDER CODES : 74ACT245B 74ACT245M 74ACT245T

DESCRIPTION The ACT245 is an advanced CMOS OCTAL BUS TRANSCEIVER (3-STATE) fabricated with sub-micron silicon gate and double-layer metal 2 wiring C MOS technology. It is ideal for low power applications mantaining high speed operation similar to equivalent Bipolar Schottky TTL. This IC is intended for two-way asynchronous communication between data buses and the

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